1. Field of the Invention
This invention relates to manufacturing methods for manufacturing semiconductor devices which use films containing amorphous fluorine carbide as interlayer insulating films for wiring. This application is based on patent application No. Hei 9-150408 filed in Japan, the content of which is incorporated herein by reference.
2. Prior Art
Recently, the downsizing and high-speed performance are demanded for semiconductor devices, while a degree of integration is improved. So, components whose sizes are determined to be less than 0.25 .mu.m in accordance with the prescribed design rule (hereinafter, simply referred to as 0.25 .mu.m design rule) are formed on a silicon substrate.
To achieve the downsizing and high-speed performance of the semiconductor devices, it is important to employ the multi-layer structure for the wiring connecting the components in addition to the fine structure in measurements of the components independently. To achieve the multi-layer structure of the wiring, it is necessary to provide separation, using an insulating film, between wires.
As the components are subjected to fine structure in measurements, the measurements of the wires and intervals of distance between the wires are subjected to fine structure in order to achieve the downsizing of the semiconductor devices. For example, in the case of the 0.35 .mu.m design rule which provides the most fine structure for the present manufactures, the wiring pitch is approximately 1.5 .mu.m. In the case of the "next generation" 0.25 .mu.m design rule, the wiring pitch ranges between 0.8 .mu.m and 1.0 .mu.m, while in the case of the 0.18 .mu.m design rule, the required wiring pitch ranges approximately between 0.4 .mu.m and 0.6 .mu.m.
As the measurements of the wires and the intervals of distances between the wires become small, the wiring capacity becomes great. So, there is a problem (or drawback) that the operating speed and power consumption of the circuits become large. To cope with such a problem, as the interlayer material for wiring, it is necessary to use the material whose dielectric constant (or permittivity) is low as compared with the conventional material corresponding to the oxide film.
As a candidate for such a low permittivity film, it is possible to provide an insulating film composed of carbon and fluorine (hereinafter, referred to as "fluoride amorphous carbon"). For example, the paper of Japanese Patent Laid-Open Publication No. 5-74960 (denoted by "paper 1") discloses an example of the conventional manufacturing method for manufacturing a semiconductor device using the above insulating film having a low dielectric constant, which is about 2.5.
Next, a description will be given with respect to the above conventional manufacturing method of the semiconductor device (hereinafter, simply referred to as "conventional example 1") with reference to FIG. 4A, FIG. 4B and FIG. 4C.
FIG. 4A, FIG. 4B and FIG. 4C are process sectional views showing a sequence of manufacturing processes for the conventional example 1.
First, as shown in FIG. 4A, a first wiring layer 416 having a film thickness of 1 .mu.m and composed of aluminum is formed on a silicon substrate 401.
Next, as shown in FIG. 4B, the conventional example 1 effects plasma polymerization that uses C.sub.2 F.sub.4 as source gas so as to deposit the material of fluoride amorphous carbon 408 to form a layer having thickness of about 1 .mu.m. The above plasma polymerization is effected under conditions that an amount of flow is set at 250 sccm, pressure at 0.1 Torr, electric power at 300 W and time of application at 10 minutes.
Then, as shown in FIG. 4C, the conventional example 1 effects the photolithography method to form VIA holes 409 in the layer of the fluoride amorphous carbon 408 while using the aluminum to form a second wiring layer 420, which is subjected to patterning. Under the aforementioned conditions, the fluoride amorphous carbon 408 is formed to have a dielectric constant of 2.4.
However, when forming the layer of the fluoride amorphous carbon on the oxide film in accordance with the conventional manufacturing method of the semiconductor device described above, there is a problem that adherence is not so good, so the layer is easily peeled off. The aforementioned paper 1 does not provide description regarding solution of the above problem. This paper 1 merely describes an example that fluoride amorphous carbon is formed on the silicon substrate.
This invention is provided to achieve an object in improvements of the adherence of the fluoride amorphous carbon formed on the oxide film, which will be described later. In other words, this invention proposes a new manufacturing method of the semiconductor device to achieve the above object by reforming the surface of the oxide film, which is a lower layer, when effecting Al etching.
Next, a description will be given with respect to conventional examples that are designed to achieve reforming of the surface of the oxide film.
First, the paper of Japanese Patent Laid-Open Publication No. 2-278731 (denoted by "paper 2") discloses an example of the conventional manufacturing method of the semiconductor device (hereinafter, referred to as "conventional example 2"), which provides a method containing a sequence of steps as follows:
Dry etching is effected to perform patterning of an Al film so that Al wires are formed. After the patterning, a surface of the Al film is subjected to cleaning using the dry etching method or wet etching method. Thus, it is possible to avoid an increase of contact resistance at VIA holes due to existence of residual gas ions on the surface of the Al film.
The content of the aforementioned conventional example 2 will be described with reference to FIG. 5A to FIG. 5E, which are process sectional views.
As shown in FIG. 5A, aluminum 504 (which corresponds to a first wiring layer) and a silicon film 511 (which is provided for anti-reflection) are sequentially formed on a semiconductor substrate 501.
Next, as shown in FIG. 5B, the semiconductor device of FIG. 5A is painted by photoresist 506 and is subjected to selective exposure to light using a mask. Using etching gas for Al, the silicon film 511 and aluminum portions 504 are subjected to selective etching.
Then, the photoresist 506 is peeled off as shown in FIG. 5C. Thereafter, etching is effected using etching gas for silicon film to remove the silicon film 511.
As shown in FIG. 5D, residual gas ions 513 remain on the aluminum 504. So, the plasma etching method using inert gas 514 such as Ar is effected to remove the residual gas ions 513.
Next, as shown in FIG. 5E, the plasma CVD method (where "CVD" is an abbreviation for "Chemical Vapor Deposition") is effected to form a SiNx film 515. In addition, VIA holes 509 are formed in the SiNx film 515. Thereafter, a second wiring layer 516 is formed using aluminum on the SiNx film 515 in contact with the VIA holes 509.
Next, a description will be given with respect to another example of the manufacturing method of the semiconductor device (hereinafter, referred to as "conventional example 3"), which is disclosed by the paper of Japanese Patent Laid-Open Publication No 63-287036 (denoted by "paper 3"). The content of the conventional example 3 will be described with reference to FIG. 6A to FIG. 6D, which are process sectional views.
As shown in FIG. 6A, a first interlayer insulating film 602, aluminum 604 (corresponding to a first wiring layer) and an anti-reflection silicon film 611 are sequentially formed on a semiconductor substrate 601. Using the photolithography process and reactive ion etching, the silicon film 611 and the aluminum 604 are subjected to selective etching.
Then, as shown in FIG. 6B, the silicon film 611 is removed by etching. Next, as shown in FIG. 6C, the RF sputter etching process using argon gas is effected on the aluminum 604 as well as a surface of the first interlayer insulating film 602, which is a bed (or substrate).
Thereafter, as shown in FIG. 6D, the conventional example 3 performs deposition of a second interlayer insulating film 618. VIA holes 609 are formed in the second interlayer insulating film 618. Then, aluminum 604A is formed as a second wiring layer on the second interlayer insulating film 618 in contact with the VIA holes 609 by using the selective etching. Incidentally, etching reactive products are adhered to a surface of an aluminum film, which is used as a bed for deposition. So, before the deposition of the second interlayer insulating film 618, the conventional example 3 removes the etching reactive products by etching. Thus, it is possible to strengthen the adherence of the interlayer insulating film formed on the aluminum film.
The conventional manufacturing methods aim at improvements of only the adherence of the interlayer insulating film formed on the aluminum wires. However, those methods are not designed in consideration of the adherence between interlayer films. In addition, the conventional manufacturing methods do not have effectiveness in formation of the fluoride amorphous carbon on the oxide film.
In the interlayer formation method using the amorphous carbon, the amorphous carbon is directly adhered to the oxide film, wherein the layer of the amorphous carbon is not formed with a good adherence and is easily peeled off, which is a problem that the conventional methods cannot solve.